篇題：First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3-D Integration With Dual Work Function Gate for Ultralow-Power SRAM and RF Applications
文章出處：IEEE Transactions on Electron Devices ( Early Access ) 10.1109/TED.2021.3138947
作者：Shu-Wei Chang, Tsung-Han Lu, Cong-Yi Yang, Cheng-Jui Yeh, Min-Kun Huang, Ching-Fan Meng, Po-Jen Chen, Ting-Hsuan Chang, Yan-Shiuan Chang, Jhe-Wei Jhu, Tzu-Chieh Hong, Chu-Chu Ke, Xin-Ren Yu, Wen-Hsiang Lu, Mohammed Aftab Baig, Ta-Chun Cho , Po-Jung Sung, Chun-Jung Su, Fu-Kuo Hsueh, Bo-Yuan Chen, Hsin-Hui Hu , Chien-Ting Wu, Kun-Lin Lin , William Cheng-Yu Ma , Darsen D. Lu, Kuo-Hsing Kao, Yao-Jen Lee**, Cheng-Li Lin, Kun-Ping Huang, Kun-Ming Chen, Yiming Li, Seiji Samukawa, Tien-Sheng Chao , Guo-Wei Huang, Wen-Fa Wu , Wen-Hsi Lee, Jiun-Yun Li, Jia-Min Shieh, Jenn-Hwan Tarng, Yeong-Her Wang, and Wen-Kuan Yeh
任職單位及部門：高雄大學電機系
In this article, heterogeneous complementary field-effect-transistor (CFET) constructed by vertically stacking amorphous indium gallium zinc oxide (a-IGZO) n-channel on poly-Si p-channel with their own dielectric layer and work function metal gate inverters were demonstrated. Meanwhile, high-frequency IGZO radio frequency (RF) devices with poly-Si as guard ring material simultaneously were fabricated in the same process. High fT and fmax IGZO Radio Frequency Integrated Circuits (RFICs) with the excellent on-off ratio need to be promoted by introducing fluorine-based gas. For the IGZO device in CFET, its threshold voltage can be tuned by the adjusted gate for ideal inverter operation at different supply voltage (VDD). Moreover, the swing of the IGZO transistor and the gain extracted from voltage transfer characteristic (VTC) curves can also be improved when the controlled gate and adjusted gate are connected as an input terminal, but the VTH tunability for the inverter is satisfied in the meantime. We also simulated 6T-SRAM circuit by SPICE model to further investigate the potential of an adjusted gate for optimizing the noise margin during SRAM operation.
文章摘要：
在本文展示了透過在多晶矽p型通道上垂直堆疊非晶態n型通道的氧化銦鎵鋅(a-IGZO)建構了異質互補場效電晶體(CFET)，並具有各自的介電層和功函數閘極金屬之反相器。同時，以多晶矽作為護環材料的高頻之IGZO射頻元件在同一製程中被同時製造。通過引入氟基氣體來促進具有出色開關比的高 fT 和 fmax IGZO 射頻積體電路 (RFIC)。對於 CFET 中的 IGZO 元件，其臨界電壓可以通過調整後的閘極進行調整，以實現不同電源電壓 (VDD) 下的理想反相器操作。此外，當受控閘極和調整閘極作為輸入端連接時，IGZO電晶體的次臨界擺幅和VTC曲線中所提取的增益也可以得到改善，但同時滿足反相器的VTH可調性.我們還通過 SPICE 模型模擬了 6T-SRAM 電路，以進一步研究調整在 SRAM 操作期間優化噪聲容限的潛力。